Digital data processing systems typically include a variety of types of components, including processing elements, memory elements, input/output elements and the like, which are interconnected by a communication link such as a bus. Buses normally include a number of paths for transferring information, including a data transfer path for transferring data and an address transfer path for transferring an address identifying the particular component and perhaps a particular storage location in the component, to or from which data is to be transferred. Buses also generally include a transfer control path over which the components transfer information for controlling their access to the bus and transfer of data and addresses over the other transfer paths. In some buses, one transfer path is provided to carry both data and addresses, and the addresses and data are multiplexed over that transfer path.
Typically, the data transfer path can transfer a predetermined amount of digital data at one time, such as thirty-two, sixty-four, or the like, data bits. A problem arises if a component needs to transfer items of data which comprise a number of bits is are somewhat greater than the number of bits that the bus can transfer at one time. The component could transfer such data items in two transfers. However, that would reduce the efficiency of data transfer over the bus and complicate the addressing structure, since each transfer would need to have a separate address associated therewith.